Flip Chip (FC) technology uses bumps instead of wire bonding to provide electrical connections between chip and substrate. The electrical performances of package are also improved through the shorter the inter-connections. Two different inter-connection bumps are generally used for FC technology, namely, solder bump and copper pillar.

Underfill materials are employed to seal the gaps between chips and substrates as a protection against environmental stresses. The underfill is an epoxy material designed to control the stresses resulting from the thermal mismatch of chips and substrates as well. Once cured, the underfill will absorb the stresses, reducing the strain on the solder joints, and greatly increasing the life time of finished flip chip products.

ChipMOS also provide flip chip solutions for lead frame package with copper pillar for power ICs.