WL CSP (Wafer Level Chip Scale Package):
Wafer-level CSP is the technology of packaging ICs while still in wafer form. This is in comparison to the conventional method of dicing the wafer into individual chip before packaging them. WL CSP is essentially a true chip-scale package (CSP) technology, since package is the same size as the die. Wafer-level packaging allows integration of wafer, packaging, test, and burn-in at wafer level in order to streamline the manufacturing process.
FC CSP (Flip Chip CSP):
FC CSP eliminates the need of wire bonding on chip packages, that chip uses bumps to connect with the substrate electrically. The flip-chip bump connection of semiconductor chip and substrate is designed to shorten the electric trace length as compared to gold wire in order to gain the better electrical performances.
CoW (Chip on Wafer):
Chip-on-Wafer is the technology which allows connecting or vertically stacking dice into multi-chip package (MCP) using wafer as a base for homogeneous or heterogeneous integration. Using high accuracy flip-chip bonding technology for interconnection, this structure provides outstanding electrical property and high reliability performance in a wafer level chip scale package.
Stacked CSP (Chip Scale Package):
Designed for two or more chips to stack vertically in a single package (ex. SRAM + Flash), it allows for a significant saving of board space.
MCM (Multi-Chip Module):
Using the concept of System-in-Package (SiP), the MCM integrates several chips or passive components into a standard package