Some electrical problems, such as: simultaneous switching noise, time delay, cross-talk and ground/power bounce, emerge accompanying the increasing of operating frequency, trace density and package shrinking. The characteristics of the designed package have to be evaluated to improve its electrical performance before putting into volume production. In ChipMOS, simulation methods have been utilized to make 2D/3D models for extracting the RLC (Resistance, Inductance and Capacitance) parameters.Thus the electrical performance in package can be guaranteed before production process.
Our customers will be provided with following data:
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RLC data for critical nets / longest and shortest trace (lead) Including: Self inductance (Ls), Mutual Inductance (Lm), Load capacitance (CL), Mutual capacitance (Cm), Resistance(R)
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Spice model
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Equivalent transmission line circuits
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Impedance (Z)
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Time Delay
CAD Tools and Industry Link Ansoft Maxwell Spicelink This tool can be used to extract the RLC data with 2D or 3D models. Equivalent SPICE files can also be obtained and time domain transient can be simulated.